modm_data.cubemx.stm32_data
1# Copyright 2017, Niklas Hauser 2# SPDX-License-Identifier: MPL-2.0 3 4import logging 5 6LOGGER = logging.getLogger("dfg.stm.data") 7 8ignored_devices = \ 9[ 10 "STM32U59", 11 "STM32U5A", 12] 13 14def ignoreDevice(device_id: str) -> bool: 15 for ignore in ignored_devices: 16 if device_id.startswith(ignore): 17 return True 18 return False 19 20 21stm32f1_gpio_remap = \ 22{ 23 # (position % 32) -> local bit position 24 # MAPR register 25 'spi1': {'position': 0, 'mask': 1, 'mapping': [0, 1]}, 26 'i2c1': {'position': 1, 'mask': 1, 'mapping': [0, 1]}, 27 'usart1': {'position': 2, 'mask': 1, 'mapping': [0, 1]}, 28 'usart2': {'position': 3, 'mask': 1, 'mapping': [0, 1]}, 29 'usart3': {'position': 4, 'mask': 3, 'mapping': [0, 1, 3]}, 30 'tim1': {'position': 6, 'mask': 3, 'mapping': [0, 1, 3]}, 31 'tim2': {'position': 8, 'mask': 3, 'mapping': [0, 1, 2, 3]}, 32 'tim3': {'position': 10, 'mask': 3, 'mapping': [0, 2, 3]}, 33 'tim4': {'position': 12, 'mask': 1, 'mapping': [0, 1]}, 34 'can': {'position': 13, 'mask': 3, 'mapping': [0, 2, 3]}, 35 'can1': {'position': 13, 'mask': 3, 'mapping': [0, 2, 3]}, 36 'pd01': {'position': 15, 'mask': 1, 'mapping': [0, 1]}, 37 'tim5ch4': {'position': 16, 'mask': 1, 'mapping': [0, 1]}, 38 'adc1etrginj': {'position': 17, 'mask': 1, 'mapping': [0, 1]}, 39 'adc1etrgreg': {'position': 18, 'mask': 1, 'mapping': [0, 1]}, 40 'adc2etrginj': {'position': 19, 'mask': 1, 'mapping': [0, 1]}, 41 'adc2etrgreg': {'position': 20, 'mask': 1, 'mapping': [0, 1]}, 42 'eth': {'position': 21, 'mask': 1, 'mapping': [0, 1]}, 43 'can2': {'position': 22, 'mask': 1, 'mapping': [0, 1]}, 44 'mii_rmii_sel': {'position': 23, 'mask': 1, 'mapping': [0, 1]}, 45 'swj_cfg': {'position': 24, 'mask': 7, 'mapping': [0, 1, 2, 4]}, 46 # position 27 is empty 47 'spi3': {'position': 28, 'mask': 1, 'mapping': [0, 1]}, 48 'i2s3': {'position': 28, 'mask': 1, 'mapping': [0, 1]}, 49 'tim2itr1': {'position': 29, 'mask': 1, 'mapping': [0, 1]}, 50 'ptp_pps': {'position': 30, 'mask': 1, 'mapping': [0, 1]}, 51 # position 31 is empty 52 # MAPR2 register 53 'tim15': {'position': 32, 'mask': 1, 'mapping': [0, 1]}, 54 'tim16': {'position': 33, 'mask': 1, 'mapping': [0, 1]}, 55 'tim17': {'position': 34, 'mask': 1, 'mapping': [0, 1]}, 56 'cec': {'position': 35, 'mask': 1, 'mapping': [0, 1]}, 57 'tim1_dma': {'position': 36, 'mask': 1, 'mapping': [0, 1]}, 58 'tim9': {'position': 37, 'mask': 1, 'mapping': [0, 1]}, 59 'tim10': {'position': 38, 'mask': 1, 'mapping': [0, 1]}, 60 'tim11': {'position': 39, 'mask': 1, 'mapping': [0, 1]}, 61 'tim13': {'position': 40, 'mask': 1, 'mapping': [0, 1]}, 62 'tim14': {'position': 41, 'mask': 1, 'mapping': [0, 1]}, 63 'fsmc_nadv': {'position': 42, 'mask': 1, 'mapping': [0, 1]}, 64 'tim67_dac_dma':{'position': 43, 'mask': 1, 'mapping': [0, 1]}, 65 'tim12': {'position': 44, 'mask': 1, 'mapping': [0, 1]}, 66 'misc': {'position': 45, 'mask': 1, 'mapping': [0, 1]}, 67} 68 69def getGpioRemapForModuleConfig(module, config): 70 mmm = {} 71 if module in stm32f1_gpio_remap: 72 mmm['mask'] = stm32f1_gpio_remap[module]['mask'] 73 mmm['position'] = stm32f1_gpio_remap[module]['position'] 74 mmm['mapping'] = stm32f1_gpio_remap[module]['mapping'][int(config)] 75 return mmm 76 77 78stm32_flash_latency = \ 79{ 80 'f0': { 81 1800: [24, 48] 82 }, 83 'f1': [ 84 {'name': ['00'], 1800: [24]}, 85 {1800: [24, 48, 72]} 86 ], 87 'f2': { 88 2700: [30, 60, 90, 120], 89 2400: [24, 48, 72, 96, 120], 90 2100: [18, 36, 54, 72, 90, 108, 120], 91 1800: [16, 32, 48, 64, 80, 96, 112, 120] 92 }, 93 'f3': { 94 1800: [24, 48, 72] 95 }, 96 'f4': [{ 97 'name': ['10', '11', '12', '13', '23'], 98 2700: [30, 60, 90, 100], 99 2400: [24, 48, 72, 96, 100], 100 2100: [18, 36, 54, 72, 90, 100], 101 1800: [16, 32, 48, 64, 80, 96, 100] 102 },{ 103 'name': ['01'], 104 2700: [30, 60, 84], 105 2400: [24, 48, 72, 84], 106 2100: [18, 36, 54, 72, 84], 107 1800: [16, 32, 48, 64, 80, 84] 108 },{ 109 'name': ['05', '07', '15', '17'], 110 2700: [30, 60, 90, 120, 150, 168], 111 2400: [24, 48, 72, 96, 120, 144, 168], 112 2100: [22, 44, 66, 88, 110, 132, 154, 168], 113 1800: [20, 40, 60, 80, 100, 120, 140, 160] 114 },{ 115 'name': ['27', '29', '37', '39', '46', '69', '79'], 116 2700: [30, 60, 90, 120, 150, 180], 117 2400: [24, 48, 72, 96, 120, 144, 168, 180], 118 2100: [22, 44, 66, 88, 110, 132, 154, 176, 180], 119 1800: [20, 40, 60, 80, 100, 120, 140, 160, 168] 120 }], 121 'f7': { 122 2700: [30, 60, 90, 120, 150, 180, 216], 123 2400: [24, 48, 72, 96, 120, 144, 168, 192, 216], 124 2100: [22, 44, 66, 88, 110, 132, 154, 176, 198, 216], 125 1800: [20, 40, 60, 80, 100, 120, 140, 160, 180] 126 }, 127 'l0': { 128 1650: [16, 32], 129 1350: [8, 16], 130 1050: [4.2] 131 }, 132 'l1': [{ # Cat 1 133 'size': ['6', '8', 'b'], 134 1800: [16, 32], 135 1500: [8, 16], 136 1200: [4.2, 8] 137 },{ # Cat 2,3,4,5,6 138 1800: [16, 32], 139 1500: [8, 16], 140 1200: [2.1, 4.2] 141 }], 142 'l4': [{ # L4+ devices 143 'name': ['r5', 'r7', 'r9', 's5', 's7', 's9', 'p5', 'q5'], 144 1280: [20, 40, 60, 80, 100, 120], 145 1200: [20, 40, 60, 80], 146 1000: [8, 16, 26] 147 },{ # L4 devices 148 1200: [16, 32, 48, 64, 80], 149 1000: [6, 12, 18, 26] 150 }], 151 'l5': { 152 1280: [20, 40, 60, 80, 110], # Vcore range 0 153 1200: [20, 40, 60, 80], # Vcore range 1 154 1000: [8, 16, 26], # Vcore range 2 155 }, 156 'g0': { 157 1200: [24, 48, 64], 158 1000: [8, 16] 159 }, 160 'g4': { 161 1280: [20, 40, 60, 80, 100, 120, 140, 160, 170], 162 1000: [8, 16, 26] 163 }, 164 'h7': [{ 165 'name': ['23', '25', '30', '33', '35'], 166 1260: [70, 140, 210, 275], 167 1150: [67, 133, 200], 168 1050: [50, 100, 150], 169 950: [35, 70, 85], 170 },{ 171 'name': ['a0', 'a3', 'b0', 'b3'], 172 1250: [42, 84, 126, 168, 210, 252, 280], 173 1150: [38, 76, 114, 152, 190, 225], 174 1050: [34, 68, 102, 136, 160], 175 950: [22, 44, 66, 88], 176 },{ # The remaining devices 177 1260: [70, 140, 210, 225, 240], 178 1150: [70, 140, 210, 225], 179 1050: [55, 110, 165, 225], 180 950: [45, 90, 135, 180, 225], 181 }], 182 'wb': { 183 1200: [18, 36, 54, 64], 184 1000: [6, 12, 16] 185 }, 186 'wl': { 187 1200: [18, 36, 48], 188 1000: [6, 12, 16] 189 }, 190 'u5': { 191 1200: [32, 64, 96, 128, 160], 192 1100: [30, 60, 90, 110], 193 1000: [24, 48, 55], 194 900: [12, 25], 195 }, 196} 197 198def getFlashLatencyForDevice(did): 199 lts = stm32_flash_latency.get(did.family) 200 if lts is None: return {}; # family not known 201 # Convert MHz to Hz and filter out string keys 202 lconv = lambda l: {k:[int(f*1e6) for f in v] for k, v in l.items() if isinstance(k, int)} 203 if isinstance(lts, dict): return lconv(lts); # whole family uses same table 204 for lt in lts: 205 # check if all conditions match 206 if all(did[k] in v for k, v in lt.items() if isinstance(k, str)): 207 return lconv(lt) # return filtered table 208 return lconv(lts[-1]) # if non were found, return last table 209 210 211stm32f3_dma_remap = \ 212{ 213 'dma1ch1': { 214 'tim17_ch1': 'tim17_up', 215 'tim17_up': {'position': 12, 'mask': 1, 'id': 0}, 216 }, 217 'dma1ch2': { 218 'adc2': {'position': 72, 'mask': 3, 'id': 2}, 219 'i2c_tx': {'position': 70, 'mask': 3, 'id': 1}, 220 'spi_rx': {'position': 64, 'mask': 3, 'id': 0}, # also 'id': 3 221 }, 222 'dma1ch3': { 223 'dac1_ch1': 'tim6_up', 224 'i2c_rx': {'position': 68, 'mask': 3, 'id': 1}, 225 'spi_tx': {'position': 66, 'mask': 3, 'id': 0}, # also 'id': 3 226 'tim16_ch1': 'tim16_up', 227 'tim16_up': {'position': 11, 'mask': 1, 'id': 0}, 228 'tim6_up': {'position': 13, 'mask': 1, 'id': 1}, 229 }, 230 'dma1ch4': { 231 'adc2': {'position': 72, 'mask': 3, 'id': 3}, 232 'dac1_ch2': 'tim7_up', 233 'i2c_tx': {'position': 70, 'mask': 3, 'id': 2}, 234 'spi_rx': {'position': 64, 'mask': 3, 'id': 1}, 235 'tim7_up': {'position': 14, 'mask': 1, 'id': 1}, 236 }, 237 'dma1ch5': { 238 'dac2_ch1': 'tim18_up', 239 'i2c_rx': {'position': 68, 'mask': 3, 'id': 2}, 240 'spi_tx': {'position': 66, 'mask': 3, 'id': 1}, 241 'tim18_up': {'position': 15, 'mask': 1, 'id': 1}, 242 }, 243 'dma1ch6': { 244 'i2c_tx': {'position': 70, 'mask': 3, 'id': 0}, # also 'id': 3 245 'spi_rx': {'position': 64, 'mask': 3, 'id': 2}, 246 }, 247 'dma1ch7': { 248 'i2c_rx': {'position': 68, 'mask': 3, 'id': 0}, # also 'id': 3 249 'spi_tx': {'position': 66, 'mask': 3, 'id': 2}, 250 'tim17_ch1': 'tim17_up', 251 'tim17_up': {'position': 12, 'mask': 1, 'id': 1}, 252 }, 253 254 255 'dma2ch1': { 256 'adc2': [{'position': 8, 'mask': 1, 'id': 0}, 257 {'position': 73, 'mask': 1, 'id': 0}], 258 'adc4': {'position': 8, 'mask': 1, 'id': 0}, 259 }, 260 'dma2ch3': { 261 'adc2': [{'position': 8, 'mask': 1, 'id': 1}, 262 {'position': 73, 'mask': 1, 'id': 0}], 263 'adc4': {'position': 8, 'mask': 1, 'id': 1}, 264 'dac1_ch1': 'tim6_up', 265 'tim6_up': {'position': 13, 'mask': 1, 'id': 0}, 266 }, 267 'dma2ch4': { 268 'dac1_ch2': 'tim7_up', 269 'tim7_up': {'position': 14, 'mask': 1, 'id': 0}, 270 }, 271 'dma2ch5': { 272 'dac2_ch1': 'tim18_up', 273 'tim18_up': {'position': 15, 'mask': 1, 'id': 0}, 274 }, 275} 276 277stm32f0_dma_remap = \ 278{ 279 'dma1ch1': { 280 'tim17_up': [{'position': 14, 'mask': 1, 'id': 1}, 281 {'position': 12, 'mask': 1, 'id': 0}], 282 'tim17_ch1': 'tim17_up', 283 'adc': {'position': 8, 'mask': 1, 'id': 0}, 284 }, 285 'dma1ch2': { 286 'tim1_ch1': {'position': 28, 'mask': 1, 'id': 0}, 287 'i2c1_tx': {'position': 27, 'mask': 1, 'id': 0}, 288 'usart3_tx': {'position': 26, 'mask': 1, 'id': 1}, 289 'tim17_up': [{'position': 14, 'mask': 1, 'id': 1}, 290 {'position': 12, 'mask': 1, 'id': 1}], 291 'tim17_ch1': 'tim17_up', 292 'usart1_tx': {'position': 9, 'mask': 1, 'id': 0}, 293 'adc': {'position': 8, 'mask': 1, 'id': 1}, 294 }, 295 'dma1ch3': { 296 'tim1_ch2': {'position': 28, 'mask': 1, 'id': 0}, 297 'tim2_ch2': {'position': 29, 'mask': 1, 'id': 0}, 298 'i2c1_rx': {'position': 27, 'mask': 1, 'id': 0}, 299 'usart3_rx': {'position': 26, 'mask': 1, 'id': 1}, 300 'tim16_up': [{'position': 13, 'mask': 1, 'id': 1}, 301 {'position': 11, 'mask': 1, 'id': 0}], 302 'tim16_ch1': 'tim16_up', 303 'usart1_rx': {'position': 10, 'mask': 1, 'id': 0}, 304 }, 305 'dma1ch4': { 306 'tim1_ch3': {'position': 28, 'mask': 1, 'id': 0}, 307 'tim3_trig': {'position': 30, 'mask': 1, 'id': 0}, 308 'tim3_ch1': 'tim3_trig', 309 'tim2_ch4': {'position': 29, 'mask': 1, 'id': 0}, 310 'usart2_tx': {'position': 25, 'mask': 1, 'id': 0}, 311 'spi2_rx': {'position': 24, 'mask': 1, 'id': 0}, 312 'tim16_up': [{'position': 13, 'mask': 1, 'id': 1}, 313 {'position': 11, 'mask': 1, 'id': 1}], 314 'tim16_ch1': 'tim16_up', 315 'usart1_tx': {'position': 9, 'mask': 1, 'id': 1}, 316 }, 317 'dma1ch5': { 318 'usart2_rx': {'position': 25, 'mask': 1, 'id': 0}, 319 'spi2_tx': {'position': 24, 'mask': 1, 'id': 0}, 320 'usart1_rx': {'position': 10, 'mask': 1, 'id': 1}, 321 }, 322 'dma1ch6': { 323 'tim3_trig': {'position': 30, 'mask': 1, 'id': 1}, 324 'tim3_ch1': 'tim3_trig', 325 'tim1_ch1': {'position': 28, 'mask': 1, 'id': 1}, 326 'tim1_ch2': 'tim1_ch1', 327 'tim1_ch3': 'tim1_ch1', 328 'i2c1_tx': {'position': 27, 'mask': 1, 'id': 1}, 329 'usart3_rx': {'position': 26, 'mask': 1, 'id': 0}, 330 'usart2_rx': {'position': 25, 'mask': 1, 'id': 1}, 331 'spi2_rx': {'position': 24, 'mask': 1, 'id': 1}, 332 'tim16_up': {'position': 13, 'mask': 1, 'id': 1}, 333 'tim16_ch1': 'tim16_up', 334 }, 335 'dma1ch7': { 336 'tim2_ch2': {'position': 29, 'mask': 1, 'id': 1}, 337 'tim2_ch4': 'tim2_ch2', 338 'i2c1_rx': {'position': 27, 'mask': 1, 'id': 1}, 339 'usart3_tx': {'position': 26, 'mask': 1, 'id': 0}, 340 'usart2_tx': {'position': 25, 'mask': 1, 'id': 1}, 341 'spi2_tx': {'position': 24, 'mask': 1, 'id': 1}, 342 'tim17_up': {'position': 14, 'mask': 1, 'id': 1}, 343 'tim17_ch1': 'tim17_up', 344 }, 345} 346 347def getDmaRemap(did, dma, channel, driver, inst, signal): 348 if did.family == "f0": 349 remap = stm32f0_dma_remap 350 elif did.family == "f3": 351 remap = stm32f3_dma_remap 352 else: 353 return None 354 355 key1 = "dma{}ch{}".format(dma, channel) 356 key2 = (driver + inst if inst else "") + ("_{}".format(signal) if signal else "") 357 358 signals = remap.get(key1, {}) 359 signal = signals.get(key2, None) 360 if signal is None: 361 return None 362 363 if isinstance(signal, str): 364 signal = signals.get(signal) 365 366 if isinstance(signal, dict): 367 signal = [signal] 368 369 # print(key1, key2, signal) 370 assert( isinstance(signal, list) ) 371 return signal 372 373 374stm32_memory = \ 375{ 376 'f0': { 377 'start': { 378 'flash': 0x08000000, 379 'sram': 0x20000000 380 }, 381 'model': [ 382 { 383 'name': ['30', '31', '38', '42', '48', '51', '58', '70', '71', '72', '78', '91', '98'], 384 'memories': {'flash': 0, 'sram1': 0} 385 } 386 ] 387 }, 388 'g0': { 389 'start': { 390 'flash': 0x08000000, 391 'sram': 0x20000000 392 }, 393 'model': [ 394 { 395 'name': ['30', '31', '41', '50', '51', '61', '70', '71', '81', 'b0', 'b1', 'c0', 'c1'], 396 'memories': {'flash': 0, 'sram1': 0} 397 } 398 ] 399 }, 400 'g4': { 401 'start': { 402 'flash': 0x08000000, 403 'ccm': 0x10000000, 404 'sram': 0x20000000 405 }, 406 'model': [ 407 { 408 'name': ['31', '41'], 409 'memories': {'flash': 0, 'sram1': 0, 'sram2': 6*1024, 'ccm': 10*1024} 410 }, 411 { 412 'name': ['91', 'a1'], 413 'memories': {'flash': 0, 'sram1': 0, 'sram2': 16*1024, 'ccm': 16*1024} 414 }, 415 { 416 'name': ['71', '73', '74', '83', '84'], 417 'memories': {'flash': 0, 'sram1': 0, 'sram2': 16*1024, 'ccm': 32*1024} 418 } 419 ] 420 }, 421 'f1': { 422 'start': { 423 'flash': 0x08000000, 424 'sram': 0x20000000 425 }, 426 'model': [ 427 { 428 'name': ['00', '01', '02', '03', '05', '07'], 429 'memories': {'flash': 0, 'sram1': 0} 430 } 431 ] 432 }, 433 'f2': { 434 'start': { 435 'flash': 0x08000000, 436 'sram': 0x20000000 437 }, 438 'model': [ 439 { 440 'name': ['05', '07', '15', '17'], 441 'memories': {'flash': 0, 'sram1': 0, 'sram2': 16*1024} 442 } 443 ] 444 }, 445 'f3': { 446 'start': { 447 'flash': 0x08000000, 448 'ccm': 0x10000000, 449 'sram': 0x20000000 450 }, 451 'model': [ 452 { 453 'name' : ['01', '02', '18', '78', '73'], 454 'memories' : {'flash': 0, 'sram1' : 0} 455 }, 456 { 457 'name': ['03', '28', '34'], 458 'size': ['4', '6', '8'], 459 'memories': {'flash': 0, 'ccm': 4*1024, 'sram1': 0} 460 }, 461 { 462 'name': ['03', '58'], 463 'size': ['b', 'c'], 464 'memories': {'flash': 0, 'ccm': 8*1024, 'sram1': 0} 465 }, 466 { 467 'name': ['03', '98'], 468 'size': ['d', 'e'], 469 'memories': {'flash': 0, 'ccm': 16*1024, 'sram1': 0} 470 } 471 ] 472 }, 473 'f4': { 474 'start': { 475 'flash': 0x08000000, 476 'ccm': 0x10000000, 477 'sram': 0x20000000, 478 'backup': 0x40024000 479 }, 480 'model': [ 481 { 482 'name' : ['01', '10', '11', '12', '46'], 483 'memories' : {'flash': 0, 'sram1' : 0} 484 }, 485 { 486 'name': ['05', '07', '15', '17'], 487 'memories': {'flash': 0, 'ccm': 64*1024, 'sram1': 0, 'sram2': 16*1024, 'backup': 4*1024} 488 }, 489 { 490 'name': ['13', '23'], 491 'memories': {'flash': 0, 'ccm': 64*1024, 'sram1': 0, 'backup': 4*1024} 492 }, 493 { 494 'name': ['27', '29', '37', '39'], 495 'memories': {'flash': 0, 'ccm': 64*1024, 'sram1': 0, 'sram2': 16*1024, 'sram3': 64*1024, 'backup': 4*1024} 496 }, 497 { 498 'name': ['69', '79'], 499 'memories': {'flash': 0, 'ccm': 64*1024, 'sram1': 0, 'sram2': 32*1024, 'sram3': 128*1024, 'backup': 4*1024} 500 } 501 ] 502 }, 503 'f7': { 504 'start': { 505 'flash': 0x00200000, 506 'dtcm': 0x20000000, 507 'itcm': 0x00000000, 508 'sram': 0x20010000, 509 'backup': 0x40024000 510 }, 511 'model': [ 512 { 513 'name': ['22', '32', '23', '30', '33', '45', '46', '50', '56'], 514 'memories': {'flash': 0, 'itcm': 16*1024, 'dtcm': 64*1024, 'sram1': 0, 'sram2': 16*1024, 'backup': 4*1024} 515 }, 516 { 517 'name': ['65', '67', '68', '69', '77', '78', '79'], 518 'memories': {'flash': 0, 'itcm': 16*1024, 'dtcm': 128*1024, 'sram1': 0, 'sram2': 16*1024, 'backup': 4*1024}, 519 'start': {'sram': 0x20020000} # overwrite due to bigger dtcm size! 520 } 521 ] 522 }, 523 'h7': { 524 'start': { 525 'flash': 0x08000000, 526 'dtcm': 0x20000000, 527 'itcm': 0x00000000, 528 'd1_sram': 0x24000000, 529 'd2_sram': 0x30000000, 530 'd3_sram': 0x38000000, 531 'backup': 0x38800000 532 }, 533 'model': [ 534 { 535 'name': ['42'], 536 'memories': {'flash': 0, 'itcm': 64*1024, 'dtcm': 128*1024, 'backup': 4*1024, 537 'd1_sram': 384*1024, 538 'd2_sram1': 32*1024, 'd2_sram2': 16*1024, 539 'd3_sram': 64*1024} 540 }, 541 { 542 'name': ['23', '25', '30', '33', '35'], 543 'memories': {'flash': 0, 'itcm': 64*1024, 'dtcm': 128*1024, 'backup': 4*1024, 544 'd1_sram': 320*1024, 545 'd2_sram1': 16*1024, 'd2_sram2': 16*1024, 546 'd3_sram': 16*1024} 547 }, 548 { 549 'name': ['40', '43', '50', '53'], 550 'memories': {'flash': 0, 'itcm': 64*1024, 'dtcm': 128*1024, 'backup': 4*1024, 551 'd1_sram': 512*1024, 552 'd2_sram1': 128*1024, 'd2_sram2': 128*1024, 'd2_sram3': 32*1024, 553 'd3_sram': 64*1024} 554 }, 555 { 556 'name': ['45', '47', '55', '57'], 557 'core': ['m7'], 558 'memories': {'flash': 0, 'itcm': 64*1024, 'dtcm': 128*1024, 'backup': 4*1024, 559 'd1_sram': 512*1024, 560 'd2_sram1': 128*1024, 'd2_sram2': 128*1024, 'd2_sram3': 32*1024, 561 'd3_sram': 64*1024} 562 }, 563 { 564 'name': ['45', '47', '55', '57'], 565 'core': ['m4'], 566 'memories': {'flash': 0, 'backup': 4*1024, 567 'd1_sram': 512*1024, 568 'd2_sram1': 128*1024, 'd2_sram2': 128*1024, 'd2_sram3': 32*1024, 569 'd3_sram': 64*1024} 570 }, 571 { 572 'name': ['a0', 'a3', 'b0', 'b3'], 573 'memories': {'flash': 0, 'itcm': 64*1024, 'dtcm': 128*1024, 'backup': 4*1024, 574 'd1_sram1': 256*1024, 'd1_sram2': 384*1024, 'd1_sram3': 384*1024, 575 'd2_sram1': 64*1024, 'd2_sram2': 64*1024, 576 'd3_sram': 32*1024} 577 } 578 ] 579 }, 580 'l0': { 581 'start': { 582 'flash': 0x08000000, 583 'eeprom': 0x08080000, 584 'sram': 0x20000000 585 }, 586 'model': [ 587 { 588 'name': ['10'], 589 'size': ['4'], 590 'memories': {'flash': 0, 'sram1': 0, 'eeprom': 128} 591 },{ 592 'name': ['10'], 593 'size': ['6', '8'], 594 'memories': {'flash': 0, 'sram1': 0, 'eeprom': 256} 595 },{ 596 # CAT1 597 'name': ['10', '11', '21'], 598 'memories': {'flash': 0, 'sram1': 0, 'eeprom': 512} 599 },{ 600 # CAT2 601 'name': ['31', '41'], 602 'memories': {'flash': 0, 'sram1': 0, 'eeprom': 1024} 603 },{ 604 # CAT3 605 'name': ['51', '52', '53', '62', '63'], 606 'memories': {'flash': 0, 'sram1': 0, 'eeprom': 2*1024} 607 },{ 608 # CAT5 609 'name': ['71', '72', '73', '81', '82', '83'], 610 'memories': {'flash': 0, 'sram1': 0, 'eeprom': 6*1024} 611 }, 612 ] 613 }, 614 'l1': { 615 'start': { 616 'flash': 0x08000000, 617 'eeprom': 0x08080000, 618 'sram': 0x20000000 619 }, 620 'model': [ 621 { 622 # CAT1 & 2 623 'name': ['00', '51', '52'], 624 'size': ['6', '8', 'b'], 625 'memories': {'flash': 0, 'sram1': 0, 'eeprom': 4*1024} 626 },{ 627 # CAT3 628 'name': ['00', '51', '52', '62'], 629 'size': ['c'], 630 'memories': {'flash': 0, 'sram1': 0, 'eeprom': 8*1024} 631 },{ 632 # CAT4 633 'name': ['51', '52', '62'], 634 'size': ['d'], 635 'memories': {'flash': 0, 'sram1': 0, 'eeprom': 12*1024} 636 },{ 637 # CAT5 & 6 638 'name': ['51', '52', '62'], 639 'size': ['e'], 640 'memories': {'flash': 0, 'sram1': 0, 'eeprom': 16*1024} 641 }, 642 ] 643 }, 644 'l4': { 645 'start': { 646 'flash': 0x08000000, 647 'ccm': 0x10000000, 648 'sram': 0x20000000 649 }, 650 'model': [ 651 { 652 'name': ['12', '22'], 653 'memories': {'flash': 0, 'sram1': 0, 'ccm': 8*1024} 654 },{ 655 'name': ['51', '71', '75', '76', '85', '86'], 656 'memories': {'flash': 0, 'sram1': 0, 'ccm': 32*1024} 657 },{ 658 'name': ['31', '32', '33', '42', '43', '52', '62'], 659 'memories': {'flash': 0, 'sram1': 0, 'ccm': 16*1024} 660 },{ 661 'name': ['96', 'a6'], 662 'memories': {'flash': 0, 'sram1': 0, 'ccm': 64*1024} 663 }, 664 # Technically part of the STM32L4+ family 665 { 666 'name': ['r5', 'r7', 'r9', 's5', 's7', 's9'], 667 'memories': {'flash': 0, 'sram1': 0, 'sram2': 64*1024, 'sram3': 384*1024} 668 },{ 669 'name': ['p5', 'q5'], 670 'memories': {'flash': 0, 'sram1': 0, 'sram2': 64*1024, 'sram3': 128*1024} 671 } 672 ] 673 }, 674 'l5': { 675 'start': { 676 'flash': 0x08000000, 677 'sram': 0x20000000 678 }, 679 'model': [ 680 { 681 'name': ['52', '62'], 682 'memories': {'flash': 0, 'sram1': 0, 'sram2': 64*1024} 683 } 684 ] 685 }, 686 'wb': { 687 'start': { 688 'flash': 0x08000000, 689 'sram': 0x20000000 690 }, 691 'model': [ 692 { 693 'name': ['10', '15', '1m'], 694 'memories': {'flash': 0, 'sram1': 0, 'sram2': 36*1024} 695 },{ 696 'name': ['30', '35', '50', '55', '5m'], 697 'memories': {'flash': 0, 'sram1': 0, 'sram2': 64*1024} 698 } 699 ] 700 }, 701 'wl': { 702 'start': { 703 'flash': 0x08000000, 704 'sram': 0x20000000 705 }, 706 'model': [ 707 { 708 'name': ['54', '55', 'e4', 'e5'], 709 'memories': {'flash': 0, 'sram1': 0, 'sram2': 32*1024} 710 } 711 ] 712 }, 713 'u5': { 714 'start': { 715 'flash': 0x08000000, 716 'sram1': 0x20000000, 717 'sram2': 0x20030000, 718 'sram3': 0x20040000, 719 'sram4': 0x28000000, 720 'bkpsram': 0x40036400, 721 }, 722 'model': [ 723 { 724 'name': ['75', '85'], 725 'memories': {'flash': 0, 'sram1': 192*1024, 'sram2': 64*1024, 'sram3': 512*1024, 'sram4': 16*1024, 'bkpsram': 2*1024} 726 } 727 # ,{ 728 # 'name': ['95', '99', 'a5', 'a9'], # This devices are not published yet... 729 # 'memories': # TODO... 730 # } 731 ] 732 }, 733} 734 735 736def getMemoryModel(device_id): 737 mem_fam = stm32_memory[device_id.family] 738 mem_model = None 739 for model in mem_fam['model']: 740 if all(device_id[k] in v for k, v in model.items() if k not in ['start', 'memories']): 741 mem_model = model 742 break 743 if mem_model == None: 744 LOGGER.error("Memory model not found for device '{}'".format(device_id.string)) 745 exit(1) 746 start = dict(mem_fam['start']) 747 memories = dict(mem_model['memories']) 748 start.update(mem_model.get('start', {})) 749 return (start, memories) 750 751def getMemoryForDevice(device_id, total_flash, total_ram): 752 mem_start, mem_model = getMemoryModel(device_id) 753 754 # Correct Flash size 755 mem_model["flash"] = total_flash 756 757 # Correct RAM size 758 main_sram = next( (name for (name, size) in mem_model.items() if size == 0), None ) 759 if main_sram is not None: 760 main_sram_name = next( ram for ram in mem_start.keys() if main_sram.startswith(ram) ) 761 # compute the size from total ram 762 mem_model[main_sram] = total_ram 763 main_sram_index = int(main_sram.split("sram")[-1]) if main_sram[-1].isdigit() else 0 764 for name, size in mem_model.items(): 765 mem_index = int(name.split("sram")[-1]) if name[-1].isdigit() else 0 766 if ((name.startswith(main_sram_name) and mem_index != main_sram_index) or 767 (device_id.family == "g4" and name.startswith("ccm"))): 768 mem_model[main_sram] -= size 769 770 # Assemble flattened memories 771 memories = [] 772 for name, size in mem_model.items(): 773 sram_name = next( ram for ram in mem_start.keys() if name.startswith(ram) ) 774 index = int(name.split("sram")[-1]) if name[-1].isdigit() else 0 775 start = mem_start[sram_name] 776 if index > 1: 777 # correct start address 778 for mem_name, mem_size in mem_model.items(): 779 mem_index = int(mem_name.split("sram")[-1]) if mem_name[-1].isdigit() else 0 780 if mem_name.startswith(sram_name) and mem_index < index: 781 start += mem_size 782 memories.append( (name, start, size) ) 783 784 return memories
LOGGER =
<Logger dfg.stm.data (WARNING)>
ignored_devices =
['STM32U59', 'STM32U5A']
def
ignoreDevice(device_id: str) -> bool:
stm32f1_gpio_remap =
{'spi1': {'position': 0, 'mask': 1, 'mapping': [0, 1]}, 'i2c1': {'position': 1, 'mask': 1, 'mapping': [0, 1]}, 'usart1': {'position': 2, 'mask': 1, 'mapping': [0, 1]}, 'usart2': {'position': 3, 'mask': 1, 'mapping': [0, 1]}, 'usart3': {'position': 4, 'mask': 3, 'mapping': [0, 1, 3]}, 'tim1': {'position': 6, 'mask': 3, 'mapping': [0, 1, 3]}, 'tim2': {'position': 8, 'mask': 3, 'mapping': [0, 1, 2, 3]}, 'tim3': {'position': 10, 'mask': 3, 'mapping': [0, 2, 3]}, 'tim4': {'position': 12, 'mask': 1, 'mapping': [0, 1]}, 'can': {'position': 13, 'mask': 3, 'mapping': [0, 2, 3]}, 'can1': {'position': 13, 'mask': 3, 'mapping': [0, 2, 3]}, 'pd01': {'position': 15, 'mask': 1, 'mapping': [0, 1]}, 'tim5ch4': {'position': 16, 'mask': 1, 'mapping': [0, 1]}, 'adc1etrginj': {'position': 17, 'mask': 1, 'mapping': [0, 1]}, 'adc1etrgreg': {'position': 18, 'mask': 1, 'mapping': [0, 1]}, 'adc2etrginj': {'position': 19, 'mask': 1, 'mapping': [0, 1]}, 'adc2etrgreg': {'position': 20, 'mask': 1, 'mapping': [0, 1]}, 'eth': {'position': 21, 'mask': 1, 'mapping': [0, 1]}, 'can2': {'position': 22, 'mask': 1, 'mapping': [0, 1]}, 'mii_rmii_sel': {'position': 23, 'mask': 1, 'mapping': [0, 1]}, 'swj_cfg': {'position': 24, 'mask': 7, 'mapping': [0, 1, 2, 4]}, 'spi3': {'position': 28, 'mask': 1, 'mapping': [0, 1]}, 'i2s3': {'position': 28, 'mask': 1, 'mapping': [0, 1]}, 'tim2itr1': {'position': 29, 'mask': 1, 'mapping': [0, 1]}, 'ptp_pps': {'position': 30, 'mask': 1, 'mapping': [0, 1]}, 'tim15': {'position': 32, 'mask': 1, 'mapping': [0, 1]}, 'tim16': {'position': 33, 'mask': 1, 'mapping': [0, 1]}, 'tim17': {'position': 34, 'mask': 1, 'mapping': [0, 1]}, 'cec': {'position': 35, 'mask': 1, 'mapping': [0, 1]}, 'tim1_dma': {'position': 36, 'mask': 1, 'mapping': [0, 1]}, 'tim9': {'position': 37, 'mask': 1, 'mapping': [0, 1]}, 'tim10': {'position': 38, 'mask': 1, 'mapping': [0, 1]}, 'tim11': {'position': 39, 'mask': 1, 'mapping': [0, 1]}, 'tim13': {'position': 40, 'mask': 1, 'mapping': [0, 1]}, 'tim14': {'position': 41, 'mask': 1, 'mapping': [0, 1]}, 'fsmc_nadv': {'position': 42, 'mask': 1, 'mapping': [0, 1]}, 'tim67_dac_dma': {'position': 43, 'mask': 1, 'mapping': [0, 1]}, 'tim12': {'position': 44, 'mask': 1, 'mapping': [0, 1]}, 'misc': {'position': 45, 'mask': 1, 'mapping': [0, 1]}}
def
getGpioRemapForModuleConfig(module, config):
stm32_flash_latency =
{'f0': {1800: [24, 48]}, 'f1': [{'name': ['00'], 1800: [24]}, {1800: [24, 48, 72]}], 'f2': {2700: [30, 60, 90, 120], 2400: [24, 48, 72, 96, 120], 2100: [18, 36, 54, 72, 90, 108, 120], 1800: [16, 32, 48, 64, 80, 96, 112, 120]}, 'f3': {1800: [24, 48, 72]}, 'f4': [{'name': ['10', '11', '12', '13', '23'], 2700: [30, 60, 90, 100], 2400: [24, 48, 72, 96, 100], 2100: [18, 36, 54, 72, 90, 100], 1800: [16, 32, 48, 64, 80, 96, 100]}, {'name': ['01'], 2700: [30, 60, 84], 2400: [24, 48, 72, 84], 2100: [18, 36, 54, 72, 84], 1800: [16, 32, 48, 64, 80, 84]}, {'name': ['05', '07', '15', '17'], 2700: [30, 60, 90, 120, 150, 168], 2400: [24, 48, 72, 96, 120, 144, 168], 2100: [22, 44, 66, 88, 110, 132, 154, 168], 1800: [20, 40, 60, 80, 100, 120, 140, 160]}, {'name': ['27', '29', '37', '39', '46', '69', '79'], 2700: [30, 60, 90, 120, 150, 180], 2400: [24, 48, 72, 96, 120, 144, 168, 180], 2100: [22, 44, 66, 88, 110, 132, 154, 176, 180], 1800: [20, 40, 60, 80, 100, 120, 140, 160, 168]}], 'f7': {2700: [30, 60, 90, 120, 150, 180, 216], 2400: [24, 48, 72, 96, 120, 144, 168, 192, 216], 2100: [22, 44, 66, 88, 110, 132, 154, 176, 198, 216], 1800: [20, 40, 60, 80, 100, 120, 140, 160, 180]}, 'l0': {1650: [16, 32], 1350: [8, 16], 1050: [4.2]}, 'l1': [{'size': ['6', '8', 'b'], 1800: [16, 32], 1500: [8, 16], 1200: [4.2, 8]}, {1800: [16, 32], 1500: [8, 16], 1200: [2.1, 4.2]}], 'l4': [{'name': ['r5', 'r7', 'r9', 's5', 's7', 's9', 'p5', 'q5'], 1280: [20, 40, 60, 80, 100, 120], 1200: [20, 40, 60, 80], 1000: [8, 16, 26]}, {1200: [16, 32, 48, 64, 80], 1000: [6, 12, 18, 26]}], 'l5': {1280: [20, 40, 60, 80, 110], 1200: [20, 40, 60, 80], 1000: [8, 16, 26]}, 'g0': {1200: [24, 48, 64], 1000: [8, 16]}, 'g4': {1280: [20, 40, 60, 80, 100, 120, 140, 160, 170], 1000: [8, 16, 26]}, 'h7': [{'name': ['23', '25', '30', '33', '35'], 1260: [70, 140, 210, 275], 1150: [67, 133, 200], 1050: [50, 100, 150], 950: [35, 70, 85]}, {'name': ['a0', 'a3', 'b0', 'b3'], 1250: [42, 84, 126, 168, 210, 252, 280], 1150: [38, 76, 114, 152, 190, 225], 1050: [34, 68, 102, 136, 160], 950: [22, 44, 66, 88]}, {1260: [70, 140, 210, 225, 240], 1150: [70, 140, 210, 225], 1050: [55, 110, 165, 225], 950: [45, 90, 135, 180, 225]}], 'wb': {1200: [18, 36, 54, 64], 1000: [6, 12, 16]}, 'wl': {1200: [18, 36, 48], 1000: [6, 12, 16]}, 'u5': {1200: [32, 64, 96, 128, 160], 1100: [30, 60, 90, 110], 1000: [24, 48, 55], 900: [12, 25]}}
def
getFlashLatencyForDevice(did):
199def getFlashLatencyForDevice(did): 200 lts = stm32_flash_latency.get(did.family) 201 if lts is None: return {}; # family not known 202 # Convert MHz to Hz and filter out string keys 203 lconv = lambda l: {k:[int(f*1e6) for f in v] for k, v in l.items() if isinstance(k, int)} 204 if isinstance(lts, dict): return lconv(lts); # whole family uses same table 205 for lt in lts: 206 # check if all conditions match 207 if all(did[k] in v for k, v in lt.items() if isinstance(k, str)): 208 return lconv(lt) # return filtered table 209 return lconv(lts[-1]) # if non were found, return last table
stm32f3_dma_remap =
{'dma1ch1': {'tim17_ch1': 'tim17_up', 'tim17_up': {'position': 12, 'mask': 1, 'id': 0}}, 'dma1ch2': {'adc2': {'position': 72, 'mask': 3, 'id': 2}, 'i2c_tx': {'position': 70, 'mask': 3, 'id': 1}, 'spi_rx': {'position': 64, 'mask': 3, 'id': 0}}, 'dma1ch3': {'dac1_ch1': 'tim6_up', 'i2c_rx': {'position': 68, 'mask': 3, 'id': 1}, 'spi_tx': {'position': 66, 'mask': 3, 'id': 0}, 'tim16_ch1': 'tim16_up', 'tim16_up': {'position': 11, 'mask': 1, 'id': 0}, 'tim6_up': {'position': 13, 'mask': 1, 'id': 1}}, 'dma1ch4': {'adc2': {'position': 72, 'mask': 3, 'id': 3}, 'dac1_ch2': 'tim7_up', 'i2c_tx': {'position': 70, 'mask': 3, 'id': 2}, 'spi_rx': {'position': 64, 'mask': 3, 'id': 1}, 'tim7_up': {'position': 14, 'mask': 1, 'id': 1}}, 'dma1ch5': {'dac2_ch1': 'tim18_up', 'i2c_rx': {'position': 68, 'mask': 3, 'id': 2}, 'spi_tx': {'position': 66, 'mask': 3, 'id': 1}, 'tim18_up': {'position': 15, 'mask': 1, 'id': 1}}, 'dma1ch6': {'i2c_tx': {'position': 70, 'mask': 3, 'id': 0}, 'spi_rx': {'position': 64, 'mask': 3, 'id': 2}}, 'dma1ch7': {'i2c_rx': {'position': 68, 'mask': 3, 'id': 0}, 'spi_tx': {'position': 66, 'mask': 3, 'id': 2}, 'tim17_ch1': 'tim17_up', 'tim17_up': {'position': 12, 'mask': 1, 'id': 1}}, 'dma2ch1': {'adc2': [{'position': 8, 'mask': 1, 'id': 0}, {'position': 73, 'mask': 1, 'id': 0}], 'adc4': {'position': 8, 'mask': 1, 'id': 0}}, 'dma2ch3': {'adc2': [{'position': 8, 'mask': 1, 'id': 1}, {'position': 73, 'mask': 1, 'id': 0}], 'adc4': {'position': 8, 'mask': 1, 'id': 1}, 'dac1_ch1': 'tim6_up', 'tim6_up': {'position': 13, 'mask': 1, 'id': 0}}, 'dma2ch4': {'dac1_ch2': 'tim7_up', 'tim7_up': {'position': 14, 'mask': 1, 'id': 0}}, 'dma2ch5': {'dac2_ch1': 'tim18_up', 'tim18_up': {'position': 15, 'mask': 1, 'id': 0}}}
stm32f0_dma_remap =
{'dma1ch1': {'tim17_up': [{'position': 14, 'mask': 1, 'id': 1}, {'position': 12, 'mask': 1, 'id': 0}], 'tim17_ch1': 'tim17_up', 'adc': {'position': 8, 'mask': 1, 'id': 0}}, 'dma1ch2': {'tim1_ch1': {'position': 28, 'mask': 1, 'id': 0}, 'i2c1_tx': {'position': 27, 'mask': 1, 'id': 0}, 'usart3_tx': {'position': 26, 'mask': 1, 'id': 1}, 'tim17_up': [{'position': 14, 'mask': 1, 'id': 1}, {'position': 12, 'mask': 1, 'id': 1}], 'tim17_ch1': 'tim17_up', 'usart1_tx': {'position': 9, 'mask': 1, 'id': 0}, 'adc': {'position': 8, 'mask': 1, 'id': 1}}, 'dma1ch3': {'tim1_ch2': {'position': 28, 'mask': 1, 'id': 0}, 'tim2_ch2': {'position': 29, 'mask': 1, 'id': 0}, 'i2c1_rx': {'position': 27, 'mask': 1, 'id': 0}, 'usart3_rx': {'position': 26, 'mask': 1, 'id': 1}, 'tim16_up': [{'position': 13, 'mask': 1, 'id': 1}, {'position': 11, 'mask': 1, 'id': 0}], 'tim16_ch1': 'tim16_up', 'usart1_rx': {'position': 10, 'mask': 1, 'id': 0}}, 'dma1ch4': {'tim1_ch3': {'position': 28, 'mask': 1, 'id': 0}, 'tim3_trig': {'position': 30, 'mask': 1, 'id': 0}, 'tim3_ch1': 'tim3_trig', 'tim2_ch4': {'position': 29, 'mask': 1, 'id': 0}, 'usart2_tx': {'position': 25, 'mask': 1, 'id': 0}, 'spi2_rx': {'position': 24, 'mask': 1, 'id': 0}, 'tim16_up': [{'position': 13, 'mask': 1, 'id': 1}, {'position': 11, 'mask': 1, 'id': 1}], 'tim16_ch1': 'tim16_up', 'usart1_tx': {'position': 9, 'mask': 1, 'id': 1}}, 'dma1ch5': {'usart2_rx': {'position': 25, 'mask': 1, 'id': 0}, 'spi2_tx': {'position': 24, 'mask': 1, 'id': 0}, 'usart1_rx': {'position': 10, 'mask': 1, 'id': 1}}, 'dma1ch6': {'tim3_trig': {'position': 30, 'mask': 1, 'id': 1}, 'tim3_ch1': 'tim3_trig', 'tim1_ch1': {'position': 28, 'mask': 1, 'id': 1}, 'tim1_ch2': 'tim1_ch1', 'tim1_ch3': 'tim1_ch1', 'i2c1_tx': {'position': 27, 'mask': 1, 'id': 1}, 'usart3_rx': {'position': 26, 'mask': 1, 'id': 0}, 'usart2_rx': {'position': 25, 'mask': 1, 'id': 1}, 'spi2_rx': {'position': 24, 'mask': 1, 'id': 1}, 'tim16_up': {'position': 13, 'mask': 1, 'id': 1}, 'tim16_ch1': 'tim16_up'}, 'dma1ch7': {'tim2_ch2': {'position': 29, 'mask': 1, 'id': 1}, 'tim2_ch4': 'tim2_ch2', 'i2c1_rx': {'position': 27, 'mask': 1, 'id': 1}, 'usart3_tx': {'position': 26, 'mask': 1, 'id': 0}, 'usart2_tx': {'position': 25, 'mask': 1, 'id': 1}, 'spi2_tx': {'position': 24, 'mask': 1, 'id': 1}, 'tim17_up': {'position': 14, 'mask': 1, 'id': 1}, 'tim17_ch1': 'tim17_up'}}
def
getDmaRemap(did, dma, channel, driver, inst, signal):
348def getDmaRemap(did, dma, channel, driver, inst, signal): 349 if did.family == "f0": 350 remap = stm32f0_dma_remap 351 elif did.family == "f3": 352 remap = stm32f3_dma_remap 353 else: 354 return None 355 356 key1 = "dma{}ch{}".format(dma, channel) 357 key2 = (driver + inst if inst else "") + ("_{}".format(signal) if signal else "") 358 359 signals = remap.get(key1, {}) 360 signal = signals.get(key2, None) 361 if signal is None: 362 return None 363 364 if isinstance(signal, str): 365 signal = signals.get(signal) 366 367 if isinstance(signal, dict): 368 signal = [signal] 369 370 # print(key1, key2, signal) 371 assert( isinstance(signal, list) ) 372 return signal
stm32_memory =
{'f0': {'start': {'flash': 134217728, 'sram': 536870912}, 'model': [{'name': ['30', '31', '38', '42', '48', '51', '58', '70', '71', '72', '78', '91', '98'], 'memories': {'flash': 0, 'sram1': 0}}]}, 'g0': {'start': {'flash': 134217728, 'sram': 536870912}, 'model': [{'name': ['30', '31', '41', '50', '51', '61', '70', '71', '81', 'b0', 'b1', 'c0', 'c1'], 'memories': {'flash': 0, 'sram1': 0}}]}, 'g4': {'start': {'flash': 134217728, 'ccm': 268435456, 'sram': 536870912}, 'model': [{'name': ['31', '41'], 'memories': {'flash': 0, 'sram1': 0, 'sram2': 6144, 'ccm': 10240}}, {'name': ['91', 'a1'], 'memories': {'flash': 0, 'sram1': 0, 'sram2': 16384, 'ccm': 16384}}, {'name': ['71', '73', '74', '83', '84'], 'memories': {'flash': 0, 'sram1': 0, 'sram2': 16384, 'ccm': 32768}}]}, 'f1': {'start': {'flash': 134217728, 'sram': 536870912}, 'model': [{'name': ['00', '01', '02', '03', '05', '07'], 'memories': {'flash': 0, 'sram1': 0}}]}, 'f2': {'start': {'flash': 134217728, 'sram': 536870912}, 'model': [{'name': ['05', '07', '15', '17'], 'memories': {'flash': 0, 'sram1': 0, 'sram2': 16384}}]}, 'f3': {'start': {'flash': 134217728, 'ccm': 268435456, 'sram': 536870912}, 'model': [{'name': ['01', '02', '18', '78', '73'], 'memories': {'flash': 0, 'sram1': 0}}, {'name': ['03', '28', '34'], 'size': ['4', '6', '8'], 'memories': {'flash': 0, 'ccm': 4096, 'sram1': 0}}, {'name': ['03', '58'], 'size': ['b', 'c'], 'memories': {'flash': 0, 'ccm': 8192, 'sram1': 0}}, {'name': ['03', '98'], 'size': ['d', 'e'], 'memories': {'flash': 0, 'ccm': 16384, 'sram1': 0}}]}, 'f4': {'start': {'flash': 134217728, 'ccm': 268435456, 'sram': 536870912, 'backup': 1073889280}, 'model': [{'name': ['01', '10', '11', '12', '46'], 'memories': {'flash': 0, 'sram1': 0}}, {'name': ['05', '07', '15', '17'], 'memories': {'flash': 0, 'ccm': 65536, 'sram1': 0, 'sram2': 16384, 'backup': 4096}}, {'name': ['13', '23'], 'memories': {'flash': 0, 'ccm': 65536, 'sram1': 0, 'backup': 4096}}, {'name': ['27', '29', '37', '39'], 'memories': {'flash': 0, 'ccm': 65536, 'sram1': 0, 'sram2': 16384, 'sram3': 65536, 'backup': 4096}}, {'name': ['69', '79'], 'memories': {'flash': 0, 'ccm': 65536, 'sram1': 0, 'sram2': 32768, 'sram3': 131072, 'backup': 4096}}]}, 'f7': {'start': {'flash': 2097152, 'dtcm': 536870912, 'itcm': 0, 'sram': 536936448, 'backup': 1073889280}, 'model': [{'name': ['22', '32', '23', '30', '33', '45', '46', '50', '56'], 'memories': {'flash': 0, 'itcm': 16384, 'dtcm': 65536, 'sram1': 0, 'sram2': 16384, 'backup': 4096}}, {'name': ['65', '67', '68', '69', '77', '78', '79'], 'memories': {'flash': 0, 'itcm': 16384, 'dtcm': 131072, 'sram1': 0, 'sram2': 16384, 'backup': 4096}, 'start': {'sram': 537001984}}]}, 'h7': {'start': {'flash': 134217728, 'dtcm': 536870912, 'itcm': 0, 'd1_sram': 603979776, 'd2_sram': 805306368, 'd3_sram': 939524096, 'backup': 947912704}, 'model': [{'name': ['42'], 'memories': {'flash': 0, 'itcm': 65536, 'dtcm': 131072, 'backup': 4096, 'd1_sram': 393216, 'd2_sram1': 32768, 'd2_sram2': 16384, 'd3_sram': 65536}}, {'name': ['23', '25', '30', '33', '35'], 'memories': {'flash': 0, 'itcm': 65536, 'dtcm': 131072, 'backup': 4096, 'd1_sram': 327680, 'd2_sram1': 16384, 'd2_sram2': 16384, 'd3_sram': 16384}}, {'name': ['40', '43', '50', '53'], 'memories': {'flash': 0, 'itcm': 65536, 'dtcm': 131072, 'backup': 4096, 'd1_sram': 524288, 'd2_sram1': 131072, 'd2_sram2': 131072, 'd2_sram3': 32768, 'd3_sram': 65536}}, {'name': ['45', '47', '55', '57'], 'core': ['m7'], 'memories': {'flash': 0, 'itcm': 65536, 'dtcm': 131072, 'backup': 4096, 'd1_sram': 524288, 'd2_sram1': 131072, 'd2_sram2': 131072, 'd2_sram3': 32768, 'd3_sram': 65536}}, {'name': ['45', '47', '55', '57'], 'core': ['m4'], 'memories': {'flash': 0, 'backup': 4096, 'd1_sram': 524288, 'd2_sram1': 131072, 'd2_sram2': 131072, 'd2_sram3': 32768, 'd3_sram': 65536}}, {'name': ['a0', 'a3', 'b0', 'b3'], 'memories': {'flash': 0, 'itcm': 65536, 'dtcm': 131072, 'backup': 4096, 'd1_sram1': 262144, 'd1_sram2': 393216, 'd1_sram3': 393216, 'd2_sram1': 65536, 'd2_sram2': 65536, 'd3_sram': 32768}}]}, 'l0': {'start': {'flash': 134217728, 'eeprom': 134742016, 'sram': 536870912}, 'model': [{'name': ['10'], 'size': ['4'], 'memories': {'flash': 0, 'sram1': 0, 'eeprom': 128}}, {'name': ['10'], 'size': ['6', '8'], 'memories': {'flash': 0, 'sram1': 0, 'eeprom': 256}}, {'name': ['10', '11', '21'], 'memories': {'flash': 0, 'sram1': 0, 'eeprom': 512}}, {'name': ['31', '41'], 'memories': {'flash': 0, 'sram1': 0, 'eeprom': 1024}}, {'name': ['51', '52', '53', '62', '63'], 'memories': {'flash': 0, 'sram1': 0, 'eeprom': 2048}}, {'name': ['71', '72', '73', '81', '82', '83'], 'memories': {'flash': 0, 'sram1': 0, 'eeprom': 6144}}]}, 'l1': {'start': {'flash': 134217728, 'eeprom': 134742016, 'sram': 536870912}, 'model': [{'name': ['00', '51', '52'], 'size': ['6', '8', 'b'], 'memories': {'flash': 0, 'sram1': 0, 'eeprom': 4096}}, {'name': ['00', '51', '52', '62'], 'size': ['c'], 'memories': {'flash': 0, 'sram1': 0, 'eeprom': 8192}}, {'name': ['51', '52', '62'], 'size': ['d'], 'memories': {'flash': 0, 'sram1': 0, 'eeprom': 12288}}, {'name': ['51', '52', '62'], 'size': ['e'], 'memories': {'flash': 0, 'sram1': 0, 'eeprom': 16384}}]}, 'l4': {'start': {'flash': 134217728, 'ccm': 268435456, 'sram': 536870912}, 'model': [{'name': ['12', '22'], 'memories': {'flash': 0, 'sram1': 0, 'ccm': 8192}}, {'name': ['51', '71', '75', '76', '85', '86'], 'memories': {'flash': 0, 'sram1': 0, 'ccm': 32768}}, {'name': ['31', '32', '33', '42', '43', '52', '62'], 'memories': {'flash': 0, 'sram1': 0, 'ccm': 16384}}, {'name': ['96', 'a6'], 'memories': {'flash': 0, 'sram1': 0, 'ccm': 65536}}, {'name': ['r5', 'r7', 'r9', 's5', 's7', 's9'], 'memories': {'flash': 0, 'sram1': 0, 'sram2': 65536, 'sram3': 393216}}, {'name': ['p5', 'q5'], 'memories': {'flash': 0, 'sram1': 0, 'sram2': 65536, 'sram3': 131072}}]}, 'l5': {'start': {'flash': 134217728, 'sram': 536870912}, 'model': [{'name': ['52', '62'], 'memories': {'flash': 0, 'sram1': 0, 'sram2': 65536}}]}, 'wb': {'start': {'flash': 134217728, 'sram': 536870912}, 'model': [{'name': ['10', '15', '1m'], 'memories': {'flash': 0, 'sram1': 0, 'sram2': 36864}}, {'name': ['30', '35', '50', '55', '5m'], 'memories': {'flash': 0, 'sram1': 0, 'sram2': 65536}}]}, 'wl': {'start': {'flash': 134217728, 'sram': 536870912}, 'model': [{'name': ['54', '55', 'e4', 'e5'], 'memories': {'flash': 0, 'sram1': 0, 'sram2': 32768}}]}, 'u5': {'start': {'flash': 134217728, 'sram1': 536870912, 'sram2': 537067520, 'sram3': 537133056, 'sram4': 671088640, 'bkpsram': 1073964032}, 'model': [{'name': ['75', '85'], 'memories': {'flash': 0, 'sram1': 196608, 'sram2': 65536, 'sram3': 524288, 'sram4': 16384, 'bkpsram': 2048}}]}}
def
getMemoryModel(device_id):
737def getMemoryModel(device_id): 738 mem_fam = stm32_memory[device_id.family] 739 mem_model = None 740 for model in mem_fam['model']: 741 if all(device_id[k] in v for k, v in model.items() if k not in ['start', 'memories']): 742 mem_model = model 743 break 744 if mem_model == None: 745 LOGGER.error("Memory model not found for device '{}'".format(device_id.string)) 746 exit(1) 747 start = dict(mem_fam['start']) 748 memories = dict(mem_model['memories']) 749 start.update(mem_model.get('start', {})) 750 return (start, memories)
def
getMemoryForDevice(device_id, total_flash, total_ram):
752def getMemoryForDevice(device_id, total_flash, total_ram): 753 mem_start, mem_model = getMemoryModel(device_id) 754 755 # Correct Flash size 756 mem_model["flash"] = total_flash 757 758 # Correct RAM size 759 main_sram = next( (name for (name, size) in mem_model.items() if size == 0), None ) 760 if main_sram is not None: 761 main_sram_name = next( ram for ram in mem_start.keys() if main_sram.startswith(ram) ) 762 # compute the size from total ram 763 mem_model[main_sram] = total_ram 764 main_sram_index = int(main_sram.split("sram")[-1]) if main_sram[-1].isdigit() else 0 765 for name, size in mem_model.items(): 766 mem_index = int(name.split("sram")[-1]) if name[-1].isdigit() else 0 767 if ((name.startswith(main_sram_name) and mem_index != main_sram_index) or 768 (device_id.family == "g4" and name.startswith("ccm"))): 769 mem_model[main_sram] -= size 770 771 # Assemble flattened memories 772 memories = [] 773 for name, size in mem_model.items(): 774 sram_name = next( ram for ram in mem_start.keys() if name.startswith(ram) ) 775 index = int(name.split("sram")[-1]) if name[-1].isdigit() else 0 776 start = mem_start[sram_name] 777 if index > 1: 778 # correct start address 779 for mem_name, mem_size in mem_model.items(): 780 mem_index = int(mem_name.split("sram")[-1]) if mem_name[-1].isdigit() else 0 781 if mem_name.startswith(sram_name) and mem_index < index: 782 start += mem_size 783 memories.append( (name, start, size) ) 784 785 return memories